Genicom 3600 - Manual (Page 165)

Appendix
A-11
A
Chip Select Generation
GALs U23 and U25 are designed to take the MC68332 bus control signals and
convert them into ASIC and I/O option control signals. A state machine
governs the timing of the signals and also dictates that the /OPTION_ASICCS
from the processor be programmed for two wait states.
I/O Option Connector
The I/O option connector J8 is a 40-position pin field. Two chip selects,
/OPTION
∗
and /BOKI/O
∗
, are used to select either the board identification
number or the data port. XMT and RCV are outputs from the I/O option cards
that are inverted and go to the processor to generate communications
interrupts.
FIFO
The FIFOs U11 and U24 are the same part as used in the Intermec 3400 and
4400 printers. The IDT 72105 is a 256 x 16 FIFO with parallel inputs and serial
output. The processor loads image data into the FIFO with word writes. At the
beginning of a line, the MC68332 loads three lines of data into the FIFO. This
causes the HF flag to go high. The ASIC then begins clocking data out of the
FIFO. The processor checks each line of the HF flag and loads the next line of
data if there is still more image to load. If the image has been completely
loaded, the FIFO empties and the /EF flag goes low. The low /EF flag tells the
ASIC to stop clocking data from the FIFO.
Front Panel Interface
Connector J15 connects to the front panel board. Inputs consist of one button
(Feed/Pause) and three LEDs (Power, Alert, and Empty/Pause). The Alert
LED indicates system errors or printhead over-temperature. The Empty/Pause
LED indicates a paused state or a media fault.
Debug Interface
J5 provides a debug interface to the processor, which allows for
troubleshooting of the main PCB. This interface can be used to put the
processor into background mode and then send commands to read or write
memory or register locations. This interface is used for in-house functional
testing and is used for engineering development.