IBM RS/6000 - Manual (Page 37)

(Version 2.0 in April of 1993) included upgrade capability through expansion
connectors.
According to PCI Specification Version 2.0, the PCI bus operates on 32- or 64-bits
of data at a clock speed of 33 MHz. This yields a local bus performance of 132
MB/sec for 32-bit transfers and 264 MB/sec for 64-bit transfers. The next PCI
Specification (Version 2.1) is expected to include a definition of 66 MHz PCI
capability, increasing local bus performance to 528 MB/sec for 64-bit transfers.
Though each PCI bus is restricted to a maximum of four slots, the addition of
multiple PCI-to-PCI bridges allows multiple PCI buses to be included in a system as
a means for providing additional slots when needed. Each PCI Bridge adds
another PCI bus, which in turn can handle up to four slots each.
2.1.1.1 PCI Features and Benefits
The PCI bus architecture has many advantages involving the following:
High data transfer speed
Processor independence
Cross-platform compatibility
Plug and Play
Investment protection
High Data Transfer Speed
The high-speed data transfer is implemented by the following functions:
Buffering and asynchronous data transfer
The PCI chip can support the processing and buffering of data and commands
sent from the processor or from the peripherals in case the peripheral or the
processor is not yet ready to receive the information.
Burst mode transfer
Variable length linear or toggle mode bursting for both reads and writes
improves write-dependant graphics performance.
Caching
To reduce the access time, the PCI bus architecture supports caching of data
which is frequently used.
DMA
The Direct Memory Access (DMA) function is used to enable peripheral units to
read from and write to memory without sending a memory request to the
processor. This function is very useful for peripherals that need to receive
large amounts of data, such as video adapters, hard disks and network
adapters.
Processor Independence
Processor independence allows manufacturers to implement PCI buses on any
computer. Any PCI-compliant peripheral will work on any PCI-compliant bus
implementation.
Cross-Platform Compatibility
Chapter 2. PCI-Based RS/6000 Server Hardware 13