IBM RS/6000 - Manual (Page 81)

Little-Endian format and must be converted to Big-Endian format as required by
AIX.
Software ROS converts the data into Big-Endian format and handles all the
differences in formats and structures so that the AIX kernel will be able to use this
data at a later time. Prior to locating the AIX boot image, Software ROS updates
the IPL control block with the address of the converted residual data.
4.2.2.1 NVRAM Initialization by Software ROS
Because of the differences in size and usage conventions of the NVRAM on the
PCI-based RS/6000 systems, it is necessary for Software ROS to initialize the
NVRAM image used by the AIX operating system. ROS allocates a section of
memory at the end of the IPL control block to use as the NVRAM buffer. Software
ROS copies and reformats the information contained in the physical NVRAM into
this buffer. The respective data is updated in the IPL control block to reflect the
size and location of the NVRAM buffer.
4.2.2.2 Construction of the IPL Control Block
On taking control of the system, Software ROS builds an IPL control block that is
compatible with AIX. The input for this control block comes from three different
sources:
Defined values Hardware-specific information that is model dependent (for
example, number of slots)
Computed values Information which is taken by calling query routines against the
platform for values (for example, amount of L2 cache)
Residual information Information which is made available by the firmware as
residual data (for example, device names)
4.2.2.3 Locating and Transferring Control to the AIX Boot Image
Software ROS uses the boot record to locate the AIX boot image. Whatever code
is at the beginning of the AIX boot image, Software ROS passes control to it. First,
it verifies whether the boot image is compressed or not (remember that this is an
option supported by the AIX V4
bosboot command).
Before passing control to the boot image, Software ROS creates a relocation
module immediately preceding the IPL control block in high memory. This relocator
is used to move the loaded boot image to begin at address 0, as required by AIX.
4.2.3 Non-Volatile RAM (NVRAM)
This memory is backed up with a battery and stores system configuration data for
use by the firmware and the different operating systems that can be run on the
machine. The NVRAM is located on the ISA bus together with the Real-Time Clock
(RTC) and, of course, the battery. On microchannel-based RS/6000 systems, this
memory is mapped directly into the memory address map and can be accessed by
the operating system directly. On PCI-based RS/6000 systems, reading and writing
to NVRAM requires that the address be gated into a register pair and the data
accessed from it one byte at a time.
The NVRAM is divided into three major areas:
Global Environment Area (GEArea)
Operating System Area (OSArea)
Chapter 4. Boot Support and Firmware 57