LSI 53C810A - Manual (Page 12)

xii Contents
7.10 Bidirectional Signals—AD[31:0], C_BE/[3:0], FRAME/,
IRDY/, TRDY/, DEVSEL/, STOP/, PERR/, PAR/
7-5
7.11 Bidirectional Signals—GPIO0_FETCH/,
GPIO1_MASTER/
7-6
7.12 TolerANT Technology Electrical Characteristics 7-7
7.13 Clock Timing 7-10
7.14 Reset Input Timing 7-11
7.15 Interrupt Output 7-11
7.16 PCI Timing 7-26
7.17 Initiator Asynchronous Send (5 Mbytes/s) 7-27
7.18 Initiator Asynchronous Receive (5 Mbytes/s) 7-28
7.19 Target Asynchronous Send (5 Mbytes/s) 7-29
7.20 Target Asynchronous Receive (5 Mbytes/s) 7-30
7.21 SCSI-1 Transfers (SE, 5.0 Mbytes/s) 7-31
7.22 SCSI-2 Fast Transfers (10.0 Mbytes/s (8-Bit Transfers),
40 MHz Clock)
7-31
7.23 SCSI-2 Fast Transfers (10.0 Mbytes/s (8-Bit Transfers),
50 MHz Clock)
7-32
A.1 Configuration Registers A-1
A.2 SCSI Registers A-2