LSI 53C810A User Manual
Page 82
5-8
Operating Registers
bit is cleared automatically when the selection or
reselection sequence is completed, or times out.
Interrupts do not occur until after this bit is reset.
An unexpected disconnect condition clears IARB without
it attempting arbitration. See the SCSI Disconnect
Unexpected bit (
, bit 7) for
more information on expected versus unexpected
disconnects.
It is possible to abort an immediate arbitration sequence.
First, set the Abort bit in the
register. Then one of two things eventually happens:
•
The Won Arbitration bit (
bit 2) will be set. In this case, the Immediate
Arbitration bit needs to be cleared. This completes the
abort sequence and disconnects the LSI53C810A
from the SCSI bus. If it is not acceptable to go to Bus
Free phase immediately following the arbitration
phase, it is possible to perform a low level selection
instead.
•
The abort completes because the LSI53C810A loses
arbitration. This is detected by clearing the Immediate
Arbitration bit. Do not use the Lost Arbitration bit
(
bit 3) to detect this
condition. In this case take no further action.
SST
Start SCSI Transfer
0
This bit is automatically set during SCRIPTS execution,
and should not be used. It causes the SCSI core to begin
a SCSI transfer, including SREQ/SACK handshaking.
The determination of whether the transfer is a send or
receive is made according to the value written to the I/O
bit in
SCSI Output Control Latch (SOCL)
. This bit is
self-clearing. Do not set it for low level operation.
Note:
Writing to this register while not connected may cause the
loss of a selection/reselection by clearing the Connected
bit.