LSI 53C810A User Manual
Page 130
5-56
Operating Registers
When bits 3 through 0 are set, the corresponding access
is considered local and the MAC/_TESTOUT pin is driven
high. When these bits are cleared, the corresponding
access is to far memory and the MAC/_TESTOUT pin is
driven low. This function is enabled after a Transfer
Control SCRIPTS instruction is executed.
DWR
DataWR
3
This bit is used to define if a data write is considered to
be a local memory access.
DRD
DataRD
2
This bit is used to define if a data read is considered to
be a local memory access.
PSCPT
Pointer SCRIPTS
1
This bit is used to define if a pointer to a SCRIPTS
indirect or table indirect fetch is considered local memory
access.
SCPTS
SCRIPTS
0
This bit is used to define if a SCRIPTS fetch is
considered to be a local memory access.
Register: 0x47 (0xC7)
General Purpose Pin Control (GPCNTL)
Read/Write
This register is used to determine if the pins controlled by the
register are inputs or outputs. Bits [1:0] in
correspond to bits [1:0] in the
register. When the bits are enabled as inputs, an
internal pull-up is also enabled.
ME
Master Enable
7
The internal bus master signal is presented on GPIO1 if
this bit is set, regardless of the state of bit 1 (GPIO1_EN).
7
6
5
2
1
0
ME
FE
R
GPIO[1:0]
0
0
x
0
1
1
1
1