LSI 53C810A - Manual (Page 229)

Index IX-7
SCSI I_O/ bit 5-25
SCSI input data latch register 5-65
SCSI instructions
block move 6-5
I/O 6-13
load/store 6-39
memory move 6-36
read/write 6-23
SCSI interrupt enable one register 5-50
SCSI interrupt enable zero register 5-48
SCSI interrupt pending bit 5-28
SCSI interrupt status one register 5-53
SCSI interrupt status zero register 5-51
SCSI isolation bit 5-61
SCSI longitudinal parity register 5-54
SCSI loopback mode bit 5-62
SCSI low level mode 5-63
SCSI MSG/ bit 5-25
SCSI output control latch register 5-18
SCSI output data latch register 5-66
SCSI parity error bit 5-49
SCSI phase mismatch - initiator mode bit 5-48
SCSI reset condition bit 5-49
SCSI RST/ received bit 5-53
SCSI RST/ signal bit 5-23
SCSI SCRIPTS operation 6-2
SCSI SDP0/ parity signal bit 5-23
SCSI selected as ID bits 5-60
SCSI selector ID register 5-19
SCSI status one register 5-24
SCSI status two register 5-25
SCSI status zero register 5-22
SCSI synchronous offset maximum bit 5-61
SCSI synchronous offset zero bit 5-60
SCSI synchronous transfer period bits 5-12
SCSI test one register 5-61
SCSI test three register 5-63
SCSI test two register 5-62
SCSI test zero register 5-60
SCSI timer one register 5-58
SCSI timer zero register 5-57
SCSI timings 7-27
SCSI transfer register 5-12
SCSI true end of process bit 5-31
SCSI valid bit 5-19
SCTRL/ 4-9
SD/[15:0] 4-9
SDID register 5-15
SDP/ bit 5-23
SDP/[1:0] 4-9
SDPL bit 5-24
SDU bit 5-9
SEL bit 5-18
,
5-20
,
5-48
,
5-52
SEL bits 5-58
select with SATN/ on a start sequence bit 5-4
selected bit 5-48
,
5-52
selection
during reselection 2-11
during selection 2-11
response to 2-11
selection or reselection time-out bit 5-50
STO bit 5-54
selection response logic test bit 5-60
selection time-out bits 5-58
SEM bit 5-27
semaphore bit 5-27
SERR/ 4-8
SFBR register 5-17
SGE bit 5-48
,
5-52
shadow register test mode bit 5-35
SI_O bit 5-20
SI_O/ status bit 5-20
SIDL bit 5-22
SIDL least significant byte full bit 5-22
SIDL register 5-65
SIEN0 register 5-48
SIEN1 register 5-50
signal process bit 5-27
,
5-31
SIGP bit 5-27
,
5-31
single step interrupt bit 5-21
,
5-44
single-ended operation 2-11
single-step mode bit 5-46
SIO/ 4-9
SIOM bit 5-42
SIP bit 5-28
SIR bit 5-21
,
5-44
SISO bit 5-61
SIST0 register 5-51
SIST1 register 5-53
SLB bit 5-62
SLPAR register 5-54
SLT bit 5-60
SMSG/ 4-9
SMSG/ status bit 5-20
SOCL register 5-18
SODL least significant byte full bit 5-23
SODL register 5-66
SODR least significant byte full bit 5-22
software reset bit 5-27
SOM bit 5-61
source I/O-memory enable bit 5-42
SOZ bit 5-60
SRE bit 5-11
SREQ/ 4-9
SREQ/ status bit 5-20
SRST bit 5-27
SRST/ 4-9
SRTM bit 5-35
SSAID bits 5-60
SSEL/ 4-9
SSEL/ status bit 5-20
SSI bit 5-21
,
5-44
SSID register 5-19
SSM bit 5-46
SST bit 5-8
SSTAT0 register 5-22
SSTAT1 register 5-24
SSTAT2 register 5-25
stacked interrupts 2-19
START bit 5-4
start DMA operation bit 5-46
start SCSI transfer bit 5-8
start sequence bit 5-4
STD bit 5-46
STEST0 register 5-60
STEST1 register 5-61
STEST2 register 5-62
STEST3 register 5-63
STIME0 register 5-57
STIME1 register 5-58
STO bit 5-50
stop 4-7