LSI 53C810A - Manual (Page 226)

IX-4 Index
SCSI bus data lines 5-66
SCSI chip ID 5-11
SCSI control one register 5-6
SCSI control register two 5-9
SCSI control three 5-9
SCSI control zero 5-2
SCSI destination ID 5-15
SCSI first byte received 5-17
SCSI input data latch 5-65
SCSI interrupt enable one 5-50
SCSI interrupt enable zero 5-48
SCSI interrupt status one 5-53
SCSI interrupt status zero 5-51
SCSI longitudinal parity 5-54
SCSI output control latch 5-18
SCSI output data latch 5-66
SCSI selector ID 5-19
SCSI status one 5-24
SCSI status two 5-25
SCSI status zero 5-22
SCSI test one 5-61
SCSI test three 5-63
SCSI test two 5-62
SCSI test zero 5-60
SCSI timer one 5-58
SCSI timer zero 5-57
SCSI transfer 5-12
temporary stack 5-33
ORF bit 5-22
P
PAR 4-6
PAR bit 5-49
,
5-53
parity 2-5
,
4-6
assert even SCSI parity bit 5-7
assert SATN/ on parity error bit 5-5
disable halt on parity error bit 5-6
enable parity checking bit 5-5
master data parity error bit 5-44
master parity error enable bit 5-35
parity error bit 5-53
SCSI parity error bit 5-49
parity error 4-8
parity error bit 5-53
PCI
bus commands and functions supported 3-2
PCI bus commands and functions supported 3-2
PCI cache mode 2-4
,
3-3
cache line size enable bit 5-45
cache line size register 3-16
enable read line bit 5-42
enable read multiple bit 5-43
memory read line command 3-6
memory read multiple command 3-7
memory write and invalidate command 3-5
write and invalidate mode bit 3-12
PCI commands 3-2
PCI configuration registers 3-9
to
3-19
base address one (memory) 3-17
base address zero (I/O) 3-17
cache line size 3-16
class code 3-15
command 3-11
device ID 3-11
header type 3-17
interrupt line 3-18
interrupt pin 3-18
latency timer 3-16
max_lat 3-19
min_gnt 3-19
revision ID 3-15
status 3-13
vendor ID 3-11
PCI configuration space 3-1
PCI I/O space 3-2
PCI memory space 3-2
PERR/ 4-8
PFEN bit 5-45
PFF bit 5-45
phase mismatch bit 5-51
physical dword address and data 4-6
pointer SCRIPTS bit
PSCPT bit 5-56
prefetch enable bit 5-45
prefetch flush bit 5-45
R
read multiple commands
enable read multiple bit 5-43
read/write instructions 6-23
read-modify-write cycles 6-26
register addresses
operating registers
0x00 5-2
0x01 5-6
0x02 5-9
0x03 5-9
0x04 5-11
0x05 5-12
0x06 5-15
0x07 5-16
0x08 5-17
0x09 5-18
0x0A 5-19
0x0B 5-20
0x0C 5-20
0x0D 5-22
0x0E 5-24
0x0F 5-25
0x10–0x13 5-26
0x14 5-26
0x18 5-29
0x19 5-30
0x1A 5-30
0x1C–0x1F 5-33
0x20 5-33
0x21 5-34
0x22 5-36
0x23 5-37
0x24–0x26 5-38
0x27 5-39
0x28–0x2B 5-39
0x2C–0x2F 5-39
0x30–0x33 5-40
0x34–0x37 5-41
0x38 5-41
0x39 5-44
0x3B 5-45
0x3C–0x3F 5-47
0x40 5-48