KEYENCE SR-750 Series - Manual (Page 89)

89 E SR-750 UM
Data write processing method (A01 to A02, B02 to B04, D+03)
The following 2 methods for writing data are available, depending on applications:
„ Real time processing
• To conduct real time processing, set the A01 address to OFF (0) in advance.
• When data is being written into the PLC, B04 switches to ON (1), and it switches
to OFF (0) when write is completed.
Point When the SR-750 Series reads bar codes at intervals faster than
PLC communication, data that is not written into the PLC will be
stored in the send buffer of the SR-750 Series.
The SR-750 can hold up to 100 pieces of data. When data exceeds
the limit, all data in the buffer is erased and "OVER" is written into
the D+04 to D+53 address.
When a send buffer overflow occurs, the SR-750 Series stops
operation, writes "OVER" into the PLC, and then returns to an
operating state.
„ Real time processing operating procedure
1
Set the A01 address to OFF (0).
2
When the SR-750 Series is writing read data into the D+04 to D+53
address, the B04 address switches to ON (1).
3
When writing of read data is complete, the B04 address returns to
OFF (0).
4
Confirm that the B04 address has returned to OFF (0) and program
data in the D+04 to D+53 address.
The D+03 address value increments every time 1 piece of data is written. By
checking the D+03 address value when the B04 address returns to OFF (0), an
omission can be prevented.
„ Sequential processing
• To conduct sequential processing, set the A01 address to ON (1) in advance.
• When the A02 address value is ON (1), the SR-750 Series writes code data read
into the D+04 to D+53 address,
• When data writing is completed, set the B03 address to ON (1).
• When read data is in the SR-750 Series, the B02 address switches to ON (1).
• When the A02 address is OFF (0), the SR-750 Series stores data in the send
buffer without writing new data.
Point In sequential processing, when the A02 address is OFF (0), new
data is not sent to the PLC, but stored in the send buffer of the SR-
750 Series. When a maximum number of 100 pieces of data is
exceeded, a buffer overflow occurs, and operation stops.
When a buffer overflow occurs, operation stops until "OVER" is
sent to the PLC.
When the PLC is ready for receiving data, be sure to set the A02
address to ON (1).
Address Description Data description
A01 Data write processing format
0: Real time processing
1: Sequential processing
B04
Real time processing
Data being written 0: No data being written
1: Data being written
Address Description Data description Data format
A01 Data write processing method
0: Real time processing
1: Sequential processing
Binary
A02
Sequential processing
Data write enabled 0: Data write disabled
1: Data write enabled
B02
Sequential processing
Data write request 0: No data
1: Data write request
B03
Sequential processing
Data write complete 0: Data write incomplete
1: Data write complete
„ Sequential processing operating procedure
1
Set the A01 address to ON (1).
2
When the SR-750 completes reading codes, the B02 address
switches to ON (1). When the A02 address is set to ON (1), the SR-
750 Series writes read data into the D+04 to D+53 address.
3
When read data writing is completed, the B03 address switches to
ON (1). When the switch of the B03 address to ON (1) is confirmed,
set the A02 address to OFF (0).
When the A02 address switches to OFF (0), the B03 address also switches to
OFF (0). The B02 address switches to OFF (0) when there is no data in the SR-
750 Series, but stays ON (1) when data remains.
4
When the A02 address switches to OFF (0), program data in the D+04
to D+53 address.
Specify read bank (D+00)
Specify a bank used for read operation.
Output data length (D+02)
The area is used to write data length output from the SR-750.
Point The output data means "Appended data + Read data".
Output data (D+04 to D+53)
* 1 When the output data length is an odd number, [NUL] (0x00) is written in the
"Output data length + 1".
* 2 The order in which data of each PLC is stored is as follows:
MELSEC : Low order byte → High order byte
SYSMAC : High order byte → Low order byte
KV : High order byte → Low order byte
* 3 The data length output from the SR-750 Series depends on the data output
length set in the SR-750 Series main unit. (Default: 64 digits)
Address Description Data description Data format
D+00 Specify read bank
0: Bank not specified (alternate)
1 to 10: Bank n specified
Binary code
Address Description Data description Data format
D+02 Output data length
Length of data output from the SR-
750 Series
Binary code
Address Description Data description Data format
D+04 to
D+53
Output data
2 characters of ASCII code/
address
*1 *2 *3
ASCII code