56 x n = 64 x n = clock invert – Verilink PRISM 3111 (34-00242) Product Manual User Manual

Page 43

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Configuration

35

56 x N =

Pressing the Scroll button allows you to select one of the 24 port bit rate settings
for the 56 kbps Rate Multiplier.

x1 = 56

x9 = 504

x17 = 952

x2 = 112

x10 = 560

x18 = 1008

x3 = 168

x11 = 616

x19 = 1064

x4 = 224

x12 = 672

x20 = 1120

x5 = 280

x13 = 728

x21 = 1176

x6 = 336

x14 = 784

x22 = 1232

x7 = 392

x15 = 840

x23 = 1288

x8 = 448

x16 = 896

x24 = 1344

64 x N =

Pressing the Scroll button allows you to select one of the 24 port bit rate settings
for the 64 kbps Rate Multiplier.

x1 = 64

x9 = 576

x17 = 1088

x2 = 128

x10 = 640

x18 = 1152

x3 = 192

x11 = 704

x19 = 1216

x4 = 256

x12 = 768

x20 = 1280

x5 = 320

x13 = 832

x21 = 1344

x6 = 384

x14 =896

x22 = 1408

x7 = 448

x15 = 960

x23 = 1472

x8 = 512

x16 = 1024

x24 = 1536

Clock

This field is used to select the clock that the unit will use to sample the data
transmitted from the DTE. When set to Int (internal), the data is automatically
edge-aligned and sampled directly with the transmit data clock that is also supplied
to the DTE as Transmit Clock. The Ext (external) option uses the external clock
supplied by DTE. The Oversamp (over sample) option is used to operate the port
as a low speed asynchronous port. In this mode, the port rate should be set to at
least four times the asynchronous data rate (depending on the degree of allowable
distortion for the particular DTE equipment used).

Invert

In the invert mode (Yes), transmit and receive data are inverted at the port
interface. This function may be used as a means of guaranteeing ones density when
the data is composed of SDLC type protocols. The choices are Yes and No.

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