Rockwell Automation 1746-HSCE,D17466.5 High-Speed Counter Module - Manual (Page 156)

Publication 1746-UM006B-EN-P - August 2005
B-2 M0 and M1 Files
Restrictions on Using
M0-M1 Data File Addresses M0 and M1 data file addresses can be used in all instructions except
the OSR instruction and the instruction parameters noted below.
Monitoring Bit Addresses For SLC 5/02 processors, the M0/M1 Monitoring option is always
disabled. (This processor does not allow you to monitor the actual
state of each addressed M0/M1 address.) For SLC 5/03, SLC 5/04, and
SLC 5/05 processors, you can choose to disable or enable the
monitoring option.
M0/M1 Monitoring Option Disabled
When you monitor a ladder program in the Run or Test mode with the
M0/M1 Monitoring option disabled, the following bit instructions,
addressed to an M0 or M1 file, are indicated as false regardless of their
actual true/false logical state.
Instruction Parameter (uses file indicator #)
BSL, BSR File (bit array)
SQO, SQC, SQL File (sequencer file)
LFL, LFU LIFO (stack)
FFL, FFU FIFO (stack)
When you are monitoring the ladder program in the Run or Test mode, the
APS or HHT display does not show these instructions as being true when the
processor evaluates them as true.
] [
Mf:e.s
b
]/[
Mf:e.s
b
( )
Mf:e.s
b
(L)
Mf:e.s
b
(U)
Mf:e.s
b
f = file (0 or 1)