Counter reset control, Counter reset control -9, In counter reset control o – Rockwell Automation 1746-HSCE,D17466.5 High-Speed Counter Module User Manual

Page 27

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Publication 1746-UM006B-EN-P - August 2005

Module Operation 2-9

Counter Reset Control

Reset Mode (bits 5,6,7) allows you to select the Accumulated Counter
reset conditions. If the pulse counter is reset, the rate calculation is not
affected. Bit 5 enables the Z reset, Bit 6 enables the limit switch reset,
and bit 7 enables the Soft Reset. The counter can be reset from any
combination of the Z input, LS input, or Soft Reset bit (M0:e.1/4).

In the Sequencer Mode, you can reset the sequencer to the Initial
Output pattern (M0:e.3/8-15) using the Sequencer Reset bit (M0:e.1/0).

The three bits can be set as follows:

Reset Mode - bits 5, 6, 7

Setup and Control
Word Bits

Reset Condition is True

7

6

5

0

0

0

Never

0

0

1

When Z is ON

0

1

0

When the limit switch is ON

0

1

1

When the limit switch and Z are ON

1

0

0

When the Soft Reset is 1

1

0

1

When the Soft Reset is 1 and Z is ON

1

1

0

When the Soft Reset is 1 and limit switch is ON

1

1

1

When the Soft Reset is 1, limit switch and Z are ON

Setup and Control Word, Word 1

Bit Number (decimal)

Reset Mode bits

15 14 13 12 11 10 9

8

7

6

5

4

3

2

1

0

M0:e.1

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