Kontron CG2100 Carrier Grade Server - Manual (Page 31)

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A1 A2 B1 B2 C1 C2 D1 D2 E1 E2
F1 F2 Mirroring
Possible?
P P P P YES
P P P P P P YES
Memory Upgrade Rules
Upgrading the system memory requires careful positioning of the DDR3 DIMMs based on
the following factors:
• Current RAS mode of operation
• Existing DDR3 DIMM population
• DDR3 DIMM characteristics
•
Optimization techniques used by the Intel® Xeon® Processor 5600 Series to maximize
memory bandwidth
In the Channel Independent mode, all DDR3 channels operate independently. Slot to slot
DIMM matching is not required across channels, that is, A1 and B1 do not have to match
with each other in terms of size, organization, and timing. DIMMs within a channel can
be of different size and organization but they operate in the maximum common
frequency. The Channel Independent mode can also be used to support a single DIMM
configuration in channel A and in the single channel mode.
The following general rules must be observed when selecting and configuring memory to
obtain the best performance from the system:
• Mixing RDIMMs and UDIMMs is not supported.
• When CPU socket 1 is empty, any DIMM memory in channel A through channel C is
unavailable.
• When CPU socket 2 is empty, any DIMM memory in channel D through channel F is
unavailable.
• If both processor sockets are populated but channel A through channel C are empty,
the platform can still function with remote memory in channel D through channel F.
However, platform performance suffers latency with remote memory.
• The memory operational mode is configurable at the channel level. Two modes are
supported: Independent Channel and Mirrored Channel.
• The memory slots of each DDR3 channel from the Intel® Xeon® Processor 5600 Series
are populated on a farthest first fashion. This holds true even for the Independent
Channel mode. Therefore, if A1 is empty, A2 cannot be populated or used.
• The BIOS selects Independent Channel mode by default, which enables all installed
memory on all channels simultaneously.
• Mirrored Channel mode is not available when only one processor is populated (CPU
socket 1).
• If both processor sockets are populated and the installed DIMMs are associated with
both processor sockets, then a given RAS mode is selected only if both of the
processor sockets are populated to conform to that mode.
• The minimum memory population possible is one DIMM in slot A1. In this
configuration, the system operates in the Independent Channel mode. RAS is not
available.
• If both processor sockets are populated, the next upgrade from the Single Channel
mode installs DIMM D1. This configuration results in an optimal memory thermal
spread, as well as Non-Uniform Memory Architecture (NUMA)-aware interleaving. The
BIOS selects the Independent Channel mode of operation.