Parameters, Interface settings, Parameters –7 – Altera POS-PHY Level 2 and 3 Compiler User Manual

Page 35: Interface settings –7, Fifo buffer & clock selector options –7, Fifo buffer & clock selector options

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Chapter 3: Functional Description

3–7

Parameters

© November 2009

Altera Corporation

POS-PHY Level 2 and 3 Compiler User Guide

Preliminary

For the POS-PHY receive interface:

The sop_ina input goes low

The addr_outa output goes low

The dpav_outa output goes low

The ppav_outa output goes low

The spav_outa output goes low

The rd_outa output goes low

For the POS-PHY transmit interface:

The wr_outA output goes low

The val_outA output goes low

'The sx_outA output goes low

The sop_outA output goes low

'The eop_outA output goes low

The err_outA output goes high

The data_outA output goes low

f

For more information on OpenCore Plus hardware evaluation, see

“OpenCore Plus

Evaluation” on page 1–4

and

AN 320: OpenCore Plus Evaluation of Megafunctions

.

Parameters

The function’s parameters, which can only be set in IP Toolbench (see

“Step 1:

Parameterize” on page 2–5

), include the following settings:

Interface Settings

Parity Settings

FIFO Buffer Settings

Address & Packet Available Settings

Interface Settings

FIFO Buffer & Clock Selector Options

The following interface ‘B’ FIFO buffer and clock selector options are available:

A Clock (No FIFO buffer)—only available if the ‘B’ interface is an Atlantic master,
and the ‘B’ interface bus width

≥ the ‘A’ interface bus width. The relevant ‘B’

interface does not use an internal FIFO buffer, and is clocked by the ‘A’ interface
clock pin. This is recommended only if you connect ‘B’ interfaces directly to
another MegaCore function with an Atlantic slave interface

A Clock—the corresponding ‘B’ interface uses an internal single clock FIFO buffer,
and is clocked by the A interface clock pin

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