Altera POS-PHY Level 2 and 3 Compiler - Manual (Page 7)

Chapter 1: About This Compiler 1–3
General Description
© November 2009 Altera Corporation POS-PHY Level 2 and 3 Compiler User Guide
Preliminary
General Description
The POS-PHY Level 2 and 3 Compiler generates MegaCore functions for use in link-
layer or physical layer (PHY) devices that transfer data to and from packet over
SONET/SDH (POS) devices using the standard POS-PHY bus.
The POS-PHY Level 2 and 3 Compiler comprises separately configurable modules,
which can be easily combined via the IP Toolbench to generate a highly
parameterized module, allowing POS-PHY compliant interfaces (and non-standard
interfaces) to be included in custom designs.
The compiler supports POS-PHY level 3 operating at up to 3.2 Gbps, and level 2
operating at up to 832 Mbps.
The POS-PHY Level 2 and 3 Compiler is compliant with all applicable standards,
including:
■ POS-PHY Level 3 Specification, Issue 4, June 2000
■ POS-PHY Level 2 Specification, Issue 5, December 1998
■ Optical Internet working Forum (OIF), System Packet Interface Level 3 (SPI-3)
■ Altera Corporation, Atlantic Interface Specification
This allows efficient translation between the different formats, including mapping
between different bus speeds and bus widths, as well as customizable FIFO buffer
parameters.
The compiler allows configurations such as PHY-PHY, link-link bridges, or packet
multiplexing MegaCore functions, and SPHY and MPHY applications.
Figure 1–1 on
page 1–3 shows the possible interfaces. Figure 1–2 on page 1–4 shows the possible
bridges.
Figure 1–1. Interfaces
MegaCore
Function
MegaCore
Function
Atlantic
Interface
Atlantic
Interface
User
Logic
Atlantic
Interface
User
Logic
Atlantic
Interface
User
Logic
Link
Interface
User
Logic
Atlantic
Interface
PHY
Interface
User
Logic
PHY/Link
Interface
SPHY MPHY
SPHY SPHY
SPHY SPHY
MegaCore
Function