NEC uPD78056Y User Manual

Page 105

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105

CHAPTER 5 CPU ARCHITECTURE

Figure 5-13. Data Memory Addressing (

µ

PD78055, 78055Y)

0000H

General Registers

32

×

8 bits

Internal ROM

40960

×

8 bits

Internal Buffer RAM

32

×

8 bits

External Memory

23168

×

8 bits

Reserved

A000H
9FFFH

FA80H
FA7FH

FAC0H
FABFH

FAE0H
FADFH

FEE0H
FEDFH

FF00H
FEFFH

FFFFH

Internal High-speed RAM

1024

×

8 bits

Reserved

FB00H
FAFFH

FF20H
FF1FH

FE20H
FE1FH

Special Function
Registers (SFRs)

256

×

8 bits

SFR Addressing

Register Addressing

Short Direct
Addressing

Direct Addressing

Register Indirect
Addressing

Based Addressing

Based Indexed
Addressing

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