NEC uPD78056Y - Manual (Page 127)

127
CHAPTER 5 CPU ARCHITECTURE
5.4.7 Based addressing
[Function]
This addressing addresses the memory by adding 8-bit immediate data to the contents of the HL register pair
which is used as a base register and by using the result of the addition. The HL register pair to be accessed
is in the register bank specified by the register bank select flags (RBS0 and RBS1). Addition is performed by
expanding the offset data as a positive number to 16 bits. A carry from the 16th bit is ignored. This addressing
can be carried out for all the memory spaces.
[Operand format]
Identifier Description
— [HL + byte]
[Description example]
MOV A, [HL + 10H]; when setting byte to 10H
Operation code 1 0 1 0 1 1 1 0
0 0 0 1 0 0 0 0