Echelon FT 3150 Smart Transceiver - Manual (Page 102)

Chapter 4 - Hardware Design Considerations
96 FT 3120 / FT 3150 Smart Transceiver Data Book
are possible as long as the general principles discussed later in this chapter are followed. Through-hole capacitors and
diodes can be used, but SMT components will generally be superior because of their lower series inductance.
Electrostatic discharge (ESD) and electromagnetic interference (EMI) are two of the most important design
considerations when laying out the PCB for a device. These topics are discussed in general terms at the end of this
chapter. The specifics relating to PCB layout issues are discussed in this section.
Tolerance of ESD and other types of network transients requires good layout of the power, ground and other device
circuitry. In general, an ESD discharge current will return to earth ground or other nearby metal structures. The
device's ground scheme must be able to pass this ESD current between the network connection and the device's
external ground connection without generating significant voltage gradients across the device's PCB. The low-
inductance Star ground scheme illustrated in Figure 4.4 and discussed below accomplishes this task.
1. Star Ground Configuration: The distribution of functional circuit blocks on the PCB should be in the form of a
star, with the power connector, network connector and any chassis ground connection all located as close as prac-
tical to the center of the star. This star ground distribution is illustrated in Figure 4.4. The goal of star ground dis-
tribution is to conduct transients out of the device with minimal disruption to other function blocks. If the device
has a metal chassis, then ESD and other transients will generally return to that chassis via the star ground center
point. If the device's logic ground is connected to this chassis ground, then connection should only be made at this
single point in the center of the star ground. Logic ground and chassis ground are shown connected in figures 4.3
and 4.4. If a device is housed in a plastic enclosure and is powered with an isolating transformer, then there may
not be any explicit earth ground or chassis ground available. In this case, it is still important for the network con-
nector and power supply connector to be located near the center of the star.
2. ESD Keepout Area: The PC board layout should be designed so that substantial ESD hits from the network will
discharge directly to the star ground center point. This is accomplished by the placement of the 470V MOV VR1,
near the network connector and near the center of the star ground. This shunts the majority of the network ESD hit
energy directly to the star center, which helps to limit the transient current that passes through the FT-X1or FT-X2
transformer. The keep-out area noted in Figure 4.3 is designed to eliminate unintended ESD discharge paths.
3. D1/D2 Clamp Diodes: The D1 and D2 diodes clamp the FT Smart Transceiver side of the FT-X1or FT-X2 trans-
former between V
CC
and ground. The V
CC
and ground connections between D1, D2, and the FT-X1or FT-X2
transformer must be made using the low inductance technique shown in Figure 4.3. This ensures that the second-
ary transient energy (remaining after the primary discharge through the MOV VR1) does not disrupt the FT Smart
Transceiver. The V
CC
and ground connections of diodes D1 and D2 are designed to return transient currents to the
star ground center point.
4. D3-D6 Clamp Diodes: The D3 through D6 diodes in Figure 4.1 (shown as D3 and D4 in Figure 4.3) clamp the
network side of the FT-X1 or FT-X2 transformer to ground through the MOV VR1 during ESD and surge tran-
sients. The connections between D3-D6, and VR1 must be made using the low inductance technique shown in
Figure 4.3. This ensures that secondary transient energy remaining after the primary discharge through the MOV
does not disrupt the FT Smart Transceiver. The connection of VR1 is designed to return transient currents to the
star ground center point.
5. Ground Planes: As ground is routed from the center of the star out to the function blocks on the board, planes or
very wide traces should be used to lower the inductance (and therefore the impedance) of the ground distribution
system.
6. +5V Power Distribution & Decoupling: In general, V
CC
should be distributed through low inductance traces
and planes in the same manner as ground. All of the ground pins on the FT Smart Transceivers should be con-
nected with either a ground plane (for PCBs with at least 4 layers) or a ground pad directly underneath the FT
Smart Transceiver chip on the component side of the board (for PCBs with 2 layers). At least three 0.1µF SMT
decoupling caps are recommended around the FT Smart Transceiver on the component side of the PCB. See fig-
ures C.9, C.10 and C.11 for more details on grounding and V
CC
decoupling for FT Smart Transceivers. The ESD
decoupling capacitor C1 should be placed immediately next to the FT-X1or FT-X2 transformer and diodes D1-D2,
as shown in Figure 4.3.