Echelon FT 3150 Smart Transceiver - Manual (Page 30)

Chapter 2 - Hardware Resources
24 FT 3120 / FT 3150 Smart Transceiver Data Book
• One-second timer initialization
• Scheduler initialization
During internal oscillator start up (after power up), the FT Smart Transceiver waits for the oscillator signal amplitude
to grow before using the oscillator waveform as the system clock. This period depends on the type of oscillator used
and its frequency, and begins as soon as power is applied to the oscillator and is independent of the RESET pin. The
oscillator start-up period may end before or after RESET is released, depending on the duration of reset and the time
required by the oscillator to start up.
After the oscillator has started up, the FT Smart Transceiver counts additional transitions on CLK1 to allow the
frequency of the oscillator to stabilize. From the time RESET is asserted until the end of the oscillator stabilization
period, the I/O pins are in a high-impedance state. The E signal goes inactive (high) immediately after reset goes low,
and the address bus becomes high (0xFFFF) to deselect external devices.
The stack initialization and BIST task tests the on-chip RAM, the timer/counter logic, and the counter logic. For the
test to pass, all three processors and the ROM must be functioning. A flag is set to indicate whether the FT Smart
Transceiver passed or failed the BIST. The RAM is cleared to all 0s by the end of this step. At the beginning of this
task, the pull-ups on IO[7:4] are enabled, so that a weak high state can be observed on these pins. The SERVICE pin
oscillates between a solid low and a weak high. The memory interface signals reflect execution of these tasks.
If the RAM self-test fails, the device goes offline, the service LED comes on solid, and an error is logged in the status
structure of the device.
Self-test results are available in the first byte of RAM (0xE800) as follows:
The SERVICE pin initialization task turns off the SERVICE pin (high state).
The state initialization task determines if a FT Smart Transceiver boot is required (FT 3150 Smart Transceiver only),
and performs the boot if it is required. The FT Smart Transceiver decides to perform a boot if it is blank, or if the boot
ID does not match the boot ID in ROM.
The off-chip RAM initialization task checks the memory map to determine if any off-chip RAM is present and then
either tests and clears all of the off-chip RAM or, optionally, clears the application RAM area only. This choice is
controlled by the application program via a Neuron C compiler directive. This task applies only to the FT 3150 Smart
Transceiver.
The random number seed calculation task creates a seed for the random number generator.
The system RAM setup task sets up internal system pointers as well as the linked lists of system buffers.
The checksum initialization task generates or checks the checksums of the nonvolatile writable memories. If the boot
process was executed for the configured or unconfigured states, in the state initialization task, then the checksums are
generated; otherwise, they are checked. This process includes on-chip EEPROM, off-chip EEPROM, flash, and off-
chip nonvolatile RAM. There are two checksums, one for the configuration image and one for the application image.
In each case, the checksum is a negated two’s complement sum of the values in the image.
The one-second timer initialization task initializes the one-second timer. At this point, the network processor is
available to accept incoming packets.
The scheduler initialization task allows the application processor to perform application-related initialization as
follows:
Value Description
0 No Failure
1 RAM failure
2 Timer/counter failure
3 Counter failure
4 Configured input clock rate exceeds the chip maximum