Echelon FT 3150 Smart Transceiver - Manual (Page 69)

FT 3120 / FT 3150 Smart Transceiver Data Book 63
Serial I/O Objects
Data are recognized in the IATA format as a series of 6-bit characters plus an even parity bit per character. The
process begins when the start sentinel (hex 05) is recognized, and continues until the end sentinel (0x0F) is
recognized. No more than 79 characters, including the 2 sentinels and the LRC character, will be read. The data is
stored as right-justified bytes in the buffer space pointed to by the buffer pointer argument in the io_in()
function with the parity stripped, and includes the start and end sentinels. This buffer should be 78 bytes long.
The magtrack1 input object optionally uses one of the I/O pins IO0 – IO7 as a timeout/abort pin. Use of this feature is
suggested since the io_in() function will update the watchdog timer during clock wait states, and could
result in a lockup if the card were to stop moving in the middle of the transfer process. If a logic 1 level is
detected on the I/O timeout pin, the io_in() function will abort. This input can be a oneshot timer counter
output, an R/C circuit, or a DATA_VALID signal from the card reader.
A FT Smart Transceiver with a clock rate of 10MHz can process an incoming bit rate of up to 7246 bits/second when
the strobe signal has a 1/3 duty cycle (t
high
= 46 µs, t
low
= 92 µs). At a bit density of 210 bits/inch, this translates
to a card speed of 34.5 inches/second. The bit rate processing capability scales with FT Smart Transceiver
input clock rate, for example: bit rate up to 28,984bps at 40MHz.
Neurowire (SPI Interface) Input/Output Object
The Neurowire object implements a full-duplex synchronous transfer of data to some peripheral device. It can operate
as the master (drive a clock out) or as the slave (accept a clock in). In both master and slave modes, up to 255 bits of
data may be transferred at a time. The Neurowire I/O suspends application processing until the operation is
completed. The Neurowire object is useful for external devices, such as A/D, D/A converters, and display drivers
incorporating serial interfaces that conform with the Motorola SPI or National Semiconductor Microwave
TM
interfaces. See Figure 3.28.
Neurowire Master Mode
In Neurowire master mode, pin IO8 is the clock (driven by the FT Smart Transceiver), IO9 is the serial data output,
and IO10 is the serial data input. Serial data is clocked out on pin IO9 at the same time as data is clocked in from pin
IO10. Data is clocked by the rising edge of the clock signal by default. The clockedge(-) keyword changes the active
edge of the clock to negative. In addition, one or more of the IO0 – IO7 pins may be used as a chip select, allowing
multiple Neurowire devices to be connected on a three-wire bus. The clock rate may be specified as 1kbps, 10kbps, or
20kbps at an input clock rate of 10MHz; these scale proportionally with input clock, for example: 4kbps, 40kbps, or
80kbps at an input clock rate of 40MHz. See Figure 3.29.
Figure 3.28 Neurowire I/O
Data In
Data Out
Clock
Timeout
Neurowire SLAVE Neurowire MASTER
Data In
Data Out
Clock
Select
IO10
IO9
IO8
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO10
IO9
IO8
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7