Echelon FT 3150 Smart Transceiver - Manual (Page 27)

FT 3120 / FT 3150 Smart Transceiver Data Book 21
Additional Functions
Software Controlled Reset
When the CPU watchdog timer expires, or a software command to reset occurs, the RESET pin is pulled low for 256
CLK1 clock cycles. The RESET pin and external capacitor (100
≤ x ≤ 1000 pF) are allowed to begin charging and
provide the required duration of reset.
Figure 2.10 Example of a Reset Circuit
Watchdog Timer
The FT Smart Transceivers are protected against malfunctioning software or memory faults by three watchdog
timers, one for each processor that makes up the Neuron core. If application or system software fails to reset these
timers periodically, the entire FT Smart Transceiver is automatically reset. The watchdog period is approximately 210
ms at a 40MHz input clock rate and scales inversely with the input clock rate.
LVI Considerations
The FT 3120 and FT 3150 Smart Transceivers include an internal LVI to ensure that they only operate above the
minimum voltage threshold. See the FT 3120 and FT 3150 Smart Transceiver Datasheet for LVI trip points. If the
circuit operates below this voltage, improper operation could occur. For example, if the FT Smart Transceiver is
writing to an internal or external EEPROM or to flash memory when a reset event is initiated, then that data could be
corrupted.
When using external flash memory for the FT 3150 Smart Transceiver device, an external pulse-stretching LVI of
greater than 50 ms should be used (Echelon recommends using Dallas Semiconductor Part No. DS1233-5). When
using an external oscillator to drive the CLK1 pin of either of the FT Smart Transceivers, a power-on-pulse-stretching
LVI may be needed to ensure that the external oscillator has stabilized before the FT Smart Transceiver is released
from reset.
Since the RESET pin of the FT Smart Transceiver is bidirectional, an external LVI must have an open-drain or open-
collector output. If an external LVI actively drives the RESET pin high, then the FT Smart Transceiver will not be
able to reliably assert the RESET pin (low) during internal resets. This contention on the FT Smart Transceiver
RESET pin can cause anomalous behavior, from applicationless errors to physical damage to the FT Smart
Transceiver reset circuitry.
5V V
DD
Smart Transceiver
LVI
To Other
Devices
(100 pF Min
1000 pF Max)
Switch
If using flash, an external pulse-stretching LVI must be used
(Dallas DS1233-10).
C
E
RESET
RESET
GND
IN