Echelon FT 3150 Smart Transceiver - Manual (Page 98)

Chapter 4 - Hardware Design Considerations
92 FT 3120 / FT 3150 Smart Transceiver Data Book
Introduction
This chapter covers the hardware design considerations for the use of the FT 3120 and FT 3150 Smart Transceivers.
These design considerations include the interconnections to the FT Smart Transceiver and the FT-X1or FT-X2
communication transformer, PCB Layout guidelines, and EN 61000-4 EMC immunity testing.
Quick Start for Users Familiar with the FTT-10A
Transceiver
For readers who are already familiar with the FTT-10A transceiver and its use with Neuron Chips, this section
summarizes the differences between designing devices using the FTT-10A transceiver and designing devices using
the FT Smart Transceivers.
There are two transformers for use with the FT Smart Transceivers. The FT-X1 transformer is a through-hole
transformer, whereas the FT-X2 is surface-mount. The FT Smart Transceivers can be used along with the FT-
X1transformer in existing PCBs that have been designed for Neuron Chips and the FTT-10A transceiver. The FT
Smart Transceiver chips have the same footprints as the corresponding Neuron Chips. The FT-X1 transformer has the
same footprint as the FTT-10A transceiver, and the pinout of the FT-X1 transformer is compatible with the
connections between the Neuron Chip and the FTT-10A transformer. Refer to the FT 3120 and FT 3150 Smart
Transceiver datasheet for more detailed information on these pinouts and footprints.
If the FT Smart Transceivers and the FT-X1 or FT-X2 transformer are substituted for the Neuron Chip and the FTT-
10A transceiver on an existing device design, the device should perform as it has in the past, with the same levels of
transient immunity, with improved magnetic field noise immunity, and with improved common-mode network noise
immunity (as tested per EN 61000-4-6). With a small component substitution and the addition of the two small
capacitors C5 and C6, the common-mode network noise immunity can be further improved over FTT-10A
transceiver-based devices. In Figure 4.1, capacitors C5 and C6 are added from T1 and T2 to ground to raise the
EN61000-4-6 common mode noise immunity to Level 3, and there is a 470V metal-oxide varistor (MOV) VR1 in
place of the 1000pF, 2kV capacitor that was used with the FTT-10A transceiver (see capacitor “C2” in Figures 2.1
and 2.2 in the FTT-10A Free Topology Transceiver User’s Guide). Also, since the 470V MOV clamps network ESD
transients before any spark gaps could fire, the spark gaps on Net1 and Net2 are no longer needed as they were with
FTT-10A transceiver-based devices. Without spark gaps, the DSP-301 spark gap component-based ESD protection
circuit (shown in Figure 2.2 in the FTT-10A Free Topology Transceiver User’s Guide) has been eliminated.
When using BAV-99-equivalent diodes for the differential clamp diodes D3-D6 in Figure 4.1, the device should pass
EN61000-4-5 Surge testing to Level 3 (2kV), just as the old FTT-10A transceiver-based devices did. However, by
using the larger 1N4935-equivalent diodes listed in Table 4.1 for D3-D6, you now should be able to achieve a higher
6kV surge immunity level. This is a new feature that was not previously available. However, 6kV surge immunity is
not generally needed in L
ON W ORKS devices, so you should only use the larger 1N4935-equivalent differential clamp
diodes if your application would benefit from the higher surge immunity level. If you have a device that is already
based on the larger diodes of Figure 2.2 in the FTT-10A Free Topology Transceiver User’s Guide, you can keep using
them with the FT Smart Transceivers, and just change the 1000pF, 2kV capacitor to the 470V MOV.
There are several other factors to consider in addition to changing the 1000pF, 2kV capacitor to the 470V MOV when
migrating to the FT Smart Transceivers. The RXD and TXD digital signal pins of the Neuron Chip are now the T1
and T2 transformer analog lines between the FT Smart Transceiver and the FT-X1or FT-X2 transformer. Since these
lines are now used for analog connections instead of digital connections, care should be taken in PCB layouts to keep
these lines close together and away from noisy digital lines. Devices that followed the PCB layout guidelines in the
FTT-10 user’s guide will already have these two traces fairly well isolated from other signals. Since the clock line is
no longer needed at the FT-X1or FT-X2 transformer position, the clock trace is not shown in the PCB layout figures
later in this chapter. V
CC
is still needed in the area of the FT-X1or FT-X2 transformer for use with the T1-T2 ESD
clamp diodes D1-D2, as shown in Figure 4.3 later in this chapter.