Application considerations, Termination of unused pins, Avoidance of damaging conditions – Echelon FT 3150 Smart Transceiver User Manual

Page 134

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Appendix C - Design and Handling Guidelines

128

FT 3120 / FT 3150 Smart Transceiver Data Book

Application Considerations

Termination of Unused Pins

Because the FT 3120 and FT 3150 Smart Transceivers are CMOS devices, unused input pins including undeclared/
unconnected I/O pins configured as inputs
and three-state must be terminated to assure proper operation and
reliability. Figure C.1 shows a CMOS inverter representative of circuitry found on CMOS input pins. When the input
is logic zero, the P-channel transistor is on (conducts), and the N-channel transistor is off. When the input is a logic
one, the P-channel transistor is off, and the N-channel transistor is on. These transistors are linear devices with
relatively broad switch points. As the input transitions through the mid-supply region, there is a duration of time
when both transistors are conducting. With fast rise time digital signals at the input, this duration is very short. Once
the inverter is out of the linear region there is very little current flow. This effect is the reason that the overall current
drain of a CMOS device is directly proportional to the switching speed. Almost all the current consumption is by
transistors passing through the linear region and charging and discharging of internal capacitances. If a pin is
configured as an input or three-state, then the input can oscillate due to supply noise or float to the mid-supply region,
resulting in higher current consumption. Current design techniques have made latch-up due to floating input unlikely,
but it is good design practice to terminate unused I/O pins that are not configured (high impedance) or are configured
as inputs. On the FT Smart Transceiver, the only pin other than the I/O pins that could be configured as an
unterminated input, is the SERVICE pin if the optional pull-up is disabled. If the optional pull-up devices are disabled
on IO4 – IO7, then termination is necessary for those pins. Pull-ups are enabled in Neuron C with the #pragma
enable_io_pullups compiler directive.

Figure C.1 CMOS Inverter

The best method to terminate unused I/O pins is with an individual pull-up or pull-down resistor for each unused pin.
Unused input pins can be connected to each other and then to a common termination point. This cost/space effective
method has the disadvantage of not allowing individual pin configuration later and the possibility of contention in the
event pins are declared as outputs. Individual unused I/O pins may be connected directly to V

SS

or V

DD

, but this is

not recommended in case of software error and the possibility of output declaration to an opposing state. Unused pins
may be declared as outputs, but this consumes application code space which is particularly valuable in FT 3120 Smart
Transceiver applications. A pin capable of being configured as an output should never be connected to another such
pin or directly to V

SS

or V

DD

.

Avoidance of Damaging Conditions

All integrated circuit devices can be damaged or destroyed by exceeding specified voltage and environmental limits.
These limits are conservative to ensure reliable operation within the conditions specified.

INPUT BUFFER

V

DD

P

N

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