Altera Floating-Point - Manual (Page 43)

Table 4-1: ALTERA_FP_ACC_CUSTOM Resource Utilization and Performance
This table lists the resource utilization and performance information for the ALTERA_FP_ACC_CUSTOM IP
core. The information was derived using the Quartus II software version 13.1.
Device
Family
Input Data Accumulator
Size
Targe
t
Frequ
ency
(MHz)
Laten
cy
ALMs
DSP
Block
s
Logic
Registers
M10K M20K f
MAX
Floati
ng
Point
Form
at
MaxM
SBX
MSBA LSBA Prima
ry
Secon
dary
Arria
V
(5AG
XFB3
H4F4
0C5)
Doub
le
24 40 -52 270 15 866 0 1,166 106 0 -- 265
Cyclo
ne V
(5CG
XFC7
D6F3
1C7)
Doub
le
24 40 -52 230 15 830 0 1,102 32 0 -- 198
Stratix
V
(5SG
XEA7
K2F40
C2)
Doub
le
24 40 -52 400 15 968 0 1,655 27 -- 0 426
Arria
V
(5AG
XFB3
H4F4
0C5)
Single 12 20 -26 270 12 337 0 588 52 0 -- 309
Cyclo
ne V
(5CG
XFC7
D6F3
1C7)
Single 12 20 -26 230 12 383 0 494 28 0 -- 225
Stratix
V
(5SG
XEA7
K2F40
C2)
Single 12 20 -26 400 13 475 0 903 20 -- 0 450
4-2 ALTERA_FP_ACC_CUSTOM Resource Utilization and Performance
UG-01058
2014.12.19
Altera Corporation ALTERA_FP_ACC_CUSTOM IP Core
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