Completing the qsys system, Simulating the system – Altera Interlaken MegaCore Function User Manual

Page 18

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2–6

Chapter 2: Getting Started

Qsys Design Flow

Interlaken MegaCore Function

June 2012

Altera Corporation

User Guide

6. Click Finish to complete the Interlaken MegaCore function and add it to the

system.

Completing the Qsys System

To complete the Qsys system, perform the following steps:

1. Add and parameterize any additional components.

2. Connect the components using the Connection panel on the System Contents tab.

3. If some signals are not displayed, click the Filter icon to display the Filters dialog

box. In the Filter list, click All Interfaces.

4. Ensure your Qsys system meets the connection and assignment requirements

listed in

“Specifying Parameters and Generating the MegaCore Function” on

page 2–3

.

5. If you intend to simulate your Qsys system, on the Generation tab, set Generate

simulation model

to Verilog to generate a functional simulation model in Verilog

HDL.

6. Click Generate to generate the system. Qsys generates the system and produces a

system .qip file, <system name>.qip, that contains the assignments and information
required to process the IP cores and system in the Quartus II Compiler. The file is
located in the <project name>/synthesis subdirectory.

7. In the Quartus II software, in the Project menu, click Add/Remove Files in Project

and add the
<system name>.qip file to the project.

Simulating the System

During system generation, Qsys optionally generates various IEEE encrypted
functional simulation models for the Interlaken MegaCore function and functional
simulation models for other components in the Qsys system. You can use these
simulation models to simulate your system with your supported simulation tool.

In addition, you can simulate the static design example that is provided in Verilog
HDL. The static design example is available for several Interlaken MegaCore function
variations. Refer to

Chapter 6, Qsys Design Examples

.

The design examples are located in the design_examples subdirectory of the
alt_interlaken

installation directory. Each testbench provides some basic stimulus to

the user interfaces of the Interlaken MegaCore function. You can use the example as a
basis for your own system simulation.

f

For information about simulating Qsys systems, refer to the

Creating a System with

Qsys

chapter in volume 1 of the Quartus II Handbook.

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