Ip core architecture, Ip core architecture -1 – Altera SerialLite III Streaming MegaCore Function User Manual
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SerialLite III Streaming IP Core Functional
Description
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The SerialLite III Streaming IP core implements a protocol that defines streaming data encapsulation at
the link layer and data encoding at the physical layer. This protocol integrates transparently with existing
hardware and provides a reliable data transfer mechanism in applications that do not need additional
layers between the data link and application.
IP Core Architecture
The SerialLite III Streaming IP core has three variations:
• Source—Formats streaming data from the user application and transmits the data over serial links.
• Sink—Receives the serial stream data from serial links, removes any formatting information, and
delivers the data to the user application.
• Duplex—Composed of both the source and sink cores. The streaming data can be transmitted and
received in both directions.
All three variations include the Altera Transceiver Native PHY IP core (Arria 10 devices) or Interlaken
PHY IP core (Stratix V and Arria V GZ devices) that utilizes hardened PCS and PMA modules. The
source and sink cores use the Native PHY or Interlaken PHY IP core in simplex mode, and the duplex
core uses the Native PHY or Interlaken PHY IP core in duplex mode.
Table 4-1: IP Core Variant and Function
Core
Function
Source
• Data encapsulation
• Generation and insertion of Idle Control Words
• Lane striping for multi-lane link
• User synchronization and burst marker insertion
Sink
• Multi-lane alignment
• Data encapsulation removal
• Idle Control Words removal
• Lane de-striping
• User synchronization and burst marker demultiplexing
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