Seriallite iii streaming ip core design guidelines – Altera SerialLite III Streaming MegaCore Function User Manual
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SerialLite III Streaming IP Core Design
Guidelines
5
2015.05.04
UG-01126
SerialLite III Streaming IP Core Design Example for Stratix V Devices
The SerialLite III Streaming IP core for Stratix V devices includes design examples for its four variations:
• SerialLite III Streaming simplex core in standard clocking mode
• SerialLite III Streaming duplex core in standard clocking mode
• SerialLite III Streaming simplex core in advanced clocking mode
• SerialLite III Streaming duplex core in advanced clocking mode
Note: In ACDS 15.0, the SerialLite III streaming IP core only includes a preset variant of hardware design
example for Arria 10 devices. Use the provided Arria 10 example testbench design as a guide to
implement your design. Refer to
The IP core variations were generated using the parameter editor. These designs serve as a demonstration
platform for highlighting the core's features and also show how to integrate the core in a typical system
environment.
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