Altera SerialLite III Streaming MegaCore Function - Manual (Page 63)

Signal Name Location Description
tx_sync_done /source/tx_sync_done This active high signal indicates that all the
lanes are bonded by the Native PHY or
Interlaken PHY IP core. This signal should be
properly asserted for normal operation. A
rapidly toggling signal indicates that the source
FIFO is having either too much or too little
data, or the core reset is having issues.
tx_cal_busy
/source/Interlaken_phy_ip_tx/ sv_
ilk_inst
Sink transceiver calibration status. This active
high signal can be used for debugging if the
reconfiguration controller is actively
calibrating during the initialization sequence.
5-8 Source Core Link Debugging
UG-01126
2015.05.04
Altera Corporation SerialLite III Streaming IP Core Design Guidelines
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