Altera Stratix II GX PCI Express Development Board - Manual (Page 32)

2–22 Reference Manual Altera Corporation
Stratix II GX PCI Express Development Board August 2006
General User Interfaces
User-Defined DIP Switch (S5)
Board reference S5 is an eight-pin DIP switch. The DIP switches in S5 are
user-defined, and are provided for additional FPGA input control. Each
pin can be set to a logic 1 by pushing it to the open position, and each pin
can be set to logic 0 by pushing it to the closed position.
Table 2–14 lists the DIP switch settings, schematic signal name, and
corresponding Stratix II GX device’s pin number.
Figure 2–9 shows the user-defined DIP switch board image.
Figure 2–9. User-Defined DIP Switch Board Image
Table 2–14. User-Defined DIP Switch Pin-Out (S5)
S5 Switch Schematic Signal Name Stratix II GX Device Pin
1 USER_DIPSW0 V36
2 USER_DIPSW1 V34
3 USER_DIPSW2 V35
4 USER_DIPSW3 W33
5 USER_DIPSW4 V33
6 USER_DIPSW5 W34
7 USER_DIPSW6 V32
8 USER_DIPSW7 V27