Altera Stratix II GX PCI Express Development Board - Manual (Page 70)

2–60 Reference Manual Altera Corporation
Stratix II GX PCI Express Development Board August 2006
Termination
Termination DDR2 Memory
The DDR2 interface signals have a single 56
Ω termination. Resistors tied
to a termination voltage of 0.9 V are called VTT. This termination scheme
is referred to as a Class I termination. The DDR2 components also provide
an optional on-chip termination of 50, 75, or 150
Ω.
QDRII Memory
The QDRII interface signals do not have board-level termination
resistors. Instead, the QDRII interface is terminated using the 50
Ω output
impedance settings available on both the Stratix II GX device and the
QDRII SRAM device. This approach simplifies board routing and lowers
power consumption.
PCI Express
The PCI Express signals have 100
Ω differential traces terminated on the
receive-side using internal termination resistors in the Stratix II GX
receiver pins.