Intel 815 - Manual (Page 106)

Integrated Graphics Display Output
R
106 Intel
®
815 Chipset Platform Design Guide
8.2 Digital Video Out
The Digital Video Out (DVO) port is a scaleable, low-interface port that ranges from 1.1V to
1.8V. This DVO port interfaces with a discrete TV encoder to enable platform support for TV-
Out, with a discrete TMDS transmitter to enable platform support for DVI-compliant digital
displays, or with an integrated TV encoder and TMDS transmitter.
The GMCH DVO port controls the video front-end devices via an I 2 C interface, by means of the
LTVDA and LTVCK pins. I
2
C is a two-wire communications bus/protocol. The protocol and bus
are used to collect EDID (extended display identification) from a digital display panel and to
detect and configure registers in the TV encoder or TMDS transmitter chips.
8.2.1 DVO Interface Routing Guidelines
Route data signals (LTVDATA[11:0]) with a trace width of 5 mils and a trace spacing of 20 mils.
These signals can be routed with a trace width of 5 mils and a trace spacing of 15 mils for
navigation around components or mounting holes. To break out of the GMCH, the DVO data
signals can be routed with a trace width of 5 mils and a trace spacing of 5 mils. The signals should
be separated to a trace width of 5 mils and a trace spacing of 20 mils, within 0.3 inch of the
GMCH component. The maximum trace length for the DVO data signals is 7 inches. These signals
should each be matched within
±
0.1 inch of the LTVCLKOUT[1] and LTVCLKOUT[0] signals.
Route the LTVCLKOUT[1:0] signals 5 mils wide and 20 mils apart. This signal pair should be a
minimum of 20 mils from any adjacent signals. The maximum length for LTVCLKOUT[1:0] is
7 inches and the two signals should be the same length.
8.2.2 DVO I
2
C Interface Considerations
LTVDA and LTVCK should be connected to the TMDS transmitter, TV encoder or integrated
TMDS transmitter/TV encoder device, as required by the specifications for those devices. LTVDA
and LTVCK should also be connected to the DVI connector as specified by the DVI specification.
Pull-ups of 4.7 k
Ω
(or pull-ups with the appropriate value derived from simulation) are required
on each of LTVDA and LTVCK.
8.2.3 Leaving the DVO Port Unconnected
If the motherboard does not implement any of the possible video devices with the universal
platform’s DVO port, the following are recommended on the motherboard:
•
Pull-up LTVDA and LTVCK with 4.7 k
Ω
resistors at the GMCH. This will prevent the
universal platform’s DVO controller from confusing noise on these lines for false I 2 C cycles.
•
Route LTVDATA[11:0] and LTVCLKOUT[1:0] out of the BGA to test points for use by
automated test equipment (if required). These signals are part of one of the GMCH XOR
chains.