Vtt decoupling design, Vref decoupling design, Figure 30. capacitor placement on the motherboard – Intel 815 User Manual
Page 64: 2 vtt decoupling design, 3 vref decoupling design
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System Bus Design Guidelines
R
64
Intel
®
815 Chipset Platform Design Guide
Figure 30. Capacitor Placement on the Motherboard
5.11.2
VTT Decoupling Design
For Itt = 2.3 A (maximum)
•
Twenty 0.1
µ
F capacitors in 0603 packages placed as closed as possible to the processor VTT
pins. The capacitors are shown on the exterior of the previous figure.
5.11.3
VREF Decoupling Design
•
Four 0.1
µ
F capacitors in 0603 package placed near VREF pins (within 500 mils).
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