Intel 815 - Manual (Page 97)

AGP/Display Cache Design Guidelines
R
Intel
®
815 Chipset Platform Design Guide 97
7.6 Additional AGP Design Guidelines
7.6.1 Compensation
The GMCH AGP interface supports resistive buffer compensation (RCOMP). Tie the GRCOMP
pin to a 40
Ω
, 2% (or 39
Ω
, 1%) pull-down resistor (to ground) via a 10-mil-wide, very short
(<0.5 inch) trace.
7.6.2 AGP Pull-Ups
AGP control signals require pull-up resistors to VDDQ on the motherboard, to ensure that they
contain stable values when no agent is actively driving the bus.
1X Timing Domain Signals Requiring Pull-Up Resistors
The signals requiring pull-up resistors are:
•
FRAME#
•
RBF#
•
TRDY#
•
PIPE#
•
IRDY#
•
REQ#
•
DEVSEL#
•
WBF#
•
STOP#
•
GNT#
•
SERR#
•
ST[2:0]
•
PERR#
Note: It is critical that these signals be pulled up to VDDQ, not 3.3V.
The trace stub to the pull-up resistor on 1X timing domain signals should be kept at less than
0.5 inch, to avoid signal reflections from the stub.
Note: The strobe signals require pull-ups/pull-downs on the motherboard to ensure that they contain
stable values when no agent is driving the bus.
Note: INTA# and INTB# should be pulled to 3.3V, not VDDQ.
2X/4X Timing Domain Signals
•
AD_STB[1:0] (pull-up to VDDQ)
•
SB_STB (pull-up to VDDQ)
•
AD_STB[1:0]# (pull-down to ground)
•
SB_STB# (pull-down to ground)
The trace stub to the pull-up/pull-down resistor on 2X/4X timing domain signals should be kept to
less than 0.1 inch to avoid signal reflections from the stub.