Intel 815 - Manual (Page 93)

AGP/Display Cache Design Guidelines
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Intel
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815 Chipset Platform Design Guide 93
7.5 AGP 2.0 Power Delivery Guidelines
7.5.1 VDDQ Generation and TYPEDET#
AGP specifies two separate power planes: VCC and VDDQ. VCC is the core power for the
graphics controller. This voltage is always 3.3V. VDDQ is the interface voltage. In AGP 1.0
implementations, VDDQ was also 3.3V. For the designer developing an AGP 1.0 motherboard,
there is no distinction between VCC and VDDQ, as both are tied to the 3.3V power plane on the
motherboard.
AGP 2.0 requires that these power planes be separate. In conjunction with the 4X data rate, the
AGP 2.0 Interface Specification provides for low-voltage (1.5V) operation. The AGP 2.0
specification implements a TYPEDET# (type detect) signal on the AGP connector that determines
the operating voltage of the AGP 2.0 interface (VDDQ). The motherboard must provide either
1.5V or 3.3V to the add-in card, depending on the state of the TYPEDET# signal. (see Table 24).
1.5V low-voltage operation applies only to the AGP interface (VDDQ). VCC is always 3.3V.
Note: The motherboard provides 3.3V to the VCC pins of the AGP connector. If the graphics controller
needs a lower voltage, then the add-in card must regulate the 3.3VCC voltage to the controller’s
requirements. The graphics controller may only power AGP I/O buffers with the VDDQ power
pins.
The TYPEDET# signal indicates whether the AGP 2.0 interface operates at 1.5V or 3.3V. If
TYPEDET# is floating (i.e., No Connect) on an AGP add-in card, the interface is 3.3V. If
TYPEDET# is shorted to ground, the interface is 1.5V.
Table 24. TYPDET#/VDDQ Relationship
TYPEDET#
(on add-in card)
VDDQ
(supplied by MB)
GND 1.5V
N/C 3.3V
As a result of this requirement, the motherboard must provide a flexible voltage regulator or key
the slot to preclude add-in cards with voltage requirements incompatible with the motherboard.
This regulator must supply the appropriate voltage to the VDDQ pins on the AGP connector. For
specific design recommendations, refer to the schematics in Appendix A. VDDQ generation and
AGP VREF generation must be considered together. Before developing VDDQ generation
circuitry, refer to both the above requirements and the AGP 2.0 Interface Specification.