Debug port changes, Figure 33. tap connector comparison, 13 debug port changes – Intel 815 User Manual
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System Bus Design Guidelines
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Intel
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815 Chipset Platform Design Guide
67
5.13
Debug Port Changes
Due to the lower voltage technology employed with newer processors, changes are required to
support the debug port. Previously, test access port (TAP) signals used 2.5V logic, as is the case
with the Intel
Celeron processor in the PPGA package. Pentium III processor (CPUID=068xh),
Celeron processor (CPUID=068xh), and future 0.13 micron socket 370 processors utilize 1.5V
logic levels on the TAP. As a result, the type of debug port connecter used in universal PGA370
designs is dependent on the processor that is currently in the socket. The 1.5V connector is a
mirror image of the older 2.5V connector. Either connector will fit into the same printed circuit
board layout. Only the pin numbers change (see Figure 33). Also required, along with the new
connector, is an In-Target Probe* (ITP) that is capable of communicating with the TAP at the
appropriate logic levels.
Figure 33. TAP Connector Comparison
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RESET#
RESET#
2.5 V connector, AMP 104068-3 vertical plug, top view
1.5 V connector, AMP 104078-4 vertical receptacle, top view
sys_bus_TAP_conn
Caution: Pentium III processor (CPUID=068xh) and Celeron processor (CPUID=068xh) require an in-
target probe (ITP) compatible with 1.5V signal levels on the TAP. Previous ITPs were designed to
work with higher voltages and may damage the processor if connected to any of these specified
processors.
See the processor datasheet for more information regarding the debug port.