Intel 815 - Manual (Page 141)

Power Delivery
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Intel
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815 Chipset Platform Design Guide 141
12 Power Delivery
This chapter contains power delivery guidelines. Table 32 provides definitions fro power delivery
terms used in this chapter.
Table 32. Power Delivery Terminology
Term Description
Suspend-To-RAM (STR) In the STR state, the system state is stored in main memory and all
unnecessary system logic is turned off. Only main memory and logic required
to wake the system remain powered. This state is used in the Customer
Reference Board (CRB) to satisfy the S3 ACPI power management state.
Full-power operation During full-power operation, all components on the motherboard remain
powered. Note that full-power operation includes both the full-on operating
state and the S1 (CPU stop-grant state) state.
Suspend operation During suspend operation, power is removed from some components on the
motherboard. The CRB supports two suspend states: Suspend-to-RAM (S3)
and Soft-off (S5).
Power rails An ATX power supply has 6 power rails: +5V, -5V, +12V, -12V, +3.3V, 5VSB.
In addition to these power rails, several other power rails are created with
voltage regulators on the CRB.
Core power rail A power rail that is only on during full-power operation. These power rails are
on when the PSON signal is asserted to the ATX power supply. The core
power rails that are distributed directly from the ATX power supply are: ±5V,
±12V and +3.3V.
Standby power rail A power rail that in on during suspend operation (these rails are also on during
full-power
operation). These rails are on at all times (when the power supply is
plugged into AC power). The only standby power rail that is distributed directly
from the ATX power supply is: 5VSB (5V Standby). There are other standby
rails that are created with voltage regulators on the motherboard.
Derived power rail A derived power rail is any power rail that is generated from another power rail.
For example, 3.3VSB is usually derived (on the motherboard) from 5VSB
using a voltage regulator (on the CRB, 3.3VSB is derived from 5V_DUAL).
Dual power rail A dual power rail is derived from different rails at different times (depending on
the power state of the system). Usually, a dual power rail is derived from a
standby supply
during suspend operation and derived from a core supply
during full-power operation. Note that the voltage on a dual power rail may be
misleading.
Figure 71 shows a power delivery architecture example for a system based on the Intel 815 chipset
platform. This power delivery architecture supports the “Instantly Available PC Design
Guidelines” via the suspend-to-RAM (STR) state. During STR, only the necessary devices are
powered. These devices include: main memory, the ICH resume well, PCI wake devices (via 3.3
Vaux), AC’97, and optionally USB (USB can be powered only if sufficient standby power is
available.). To ensure that enough power is available during STR, a thorough power budget should
be completed. The power requirements should include each device’s power requirements, both in
suspend and in full-power. The power requirements should be compared with the power budget