Figure 2-26. ai/sampleclock output, Other timing requirements, Other timing requirements -39 – National Instruments Data Acquisition Device E Series User Manual
Page 72
Chapter 2
Analog Input
© National Instruments Corporation
2-39
Figure 2-26. ai/SampleClock Output
The PFI 7/AI SAMP CLK pin is configured as an input by default.
Other Timing Requirements
A counter on your device internally generates ai/SampleClock unless you
select some external source. The ai/StartTrigger signal starts this counter.
It is stopped automatically by hardware once a finite acquisition completes
or manually through software. When using an internally generated
ai/SampleClock, you can also specify a configurable delay from the
ai/StartTrigger to the first ai/SampleClock pulse. By default, this delay is
two ticks of the ai/SampleClockTimebase signal. When using an externally
generated ai/SampleClock in NI-DAQmx, you must ensure the clock signal
is matched with respect to the timing requirements of the ai/ConvertClock
signal. Failure to do so may result in ai/SampleClock pulses that are
masked off and acquisitions with erratic sampling intervals. Refer to the
section for more information about the timing
requirements between ai/ConvertClock and ai/SampleClock.
b. Level Behavior. Two Conversions per Sample.
ai/StartTrigger
ai/ConvertClock
ai/SampleClock
t
off
= 10 ns minimum
t
off