Altera PCI Compiler - Manual (Page 115)

Altera Corporation User Guide Version 11.1 3–41
October 2011
Functional Description
Subsystem ID Register
The subsystem ID register identifies the subsystem. The value of this
register is defined by the subsystem vendor, i.e., the designer. Refer to
Table 3–27 . The default value of the subsystem ID register is 0x0000.
However, you can change the value through the wizard.
Expansion ROM Base Address Register
The expansion ROM base address register contains a 32-bit hexadecimal
number that defines the base address and size information of the
expansion ROM. Instantiate the expansion ROM BAR using the
Parameterize - PCI Compiler
wizard. The expansion ROM BAR
functions exactly like a 32-bit BAR, except that the encoding of the bottom
bits is different. Bit 0 in the register is a read/write and is used to indicate
whether or not the device accepts accesses to its expansion ROM. You can
disable the expansion ROM address space by setting bit 0 to 0. You can
enable the address decoding of the expansion ROM by setting bit 0 to 1.
The upper 21 bits correspond to the upper 21 bits of the expansion ROM
base address. The amount of address space a device requests must not be
greater than 16 Megabytes (MBytes). The expansion ROM BAR is
formatted per the PCI Local Bus Specification, Revision 3.0. Refer to
Table 3–28 .
Table 3–27. Subsystem ID Register Format
Data Bit Mnemonic Read/Write Definition
15..0 sub_id Read PCI subsystem ID
Table 3–28. Expansion ROM Base Address Register Format
Data
Bit
Mnemonic Read/Write Definition
0 adr_ena Read/write Address decode enable. The adr_ena bit indicates whether or not the
device accepts accesses to its expansion ROM. You can disable the
expansion ROM address space by setting this bit to 0. You can enable the
address decoding of the expansion ROM by setting this bit to 1.
10..1 Reserved – –
31..11 bar Read/write Expansion ROM base address registers.