Optional interrupt capabilities, Master features – Altera PCI Compiler User Manual

Page 62

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2–4

User Guide Version 11.1

Altera Corporation

PCI Compiler

October 2011

Advanced PCI MegaCore Function Features

Optional Interrupt Capabilities

The PCI MegaCore functions support optional PCI interrupt capabilities.
For example, if an application uses the interrupt pin, the interrupt pin
register indicates that the interrupt signal (intan) is used by storing a
value of 0x01 in the interrupt pin register. Turning off Use Interrupt Pin
on the Advanced PCI MegaCore Function Features page results in the
interrupt pin register being set to 0x00.

The PCI MegaCore functions also include an option to respond to the
interrupt acknowledge command. If Support Interrupt Acknowledge
Command

is turned off, the PCI MegaCore function ignores the interrupt

acknowledge command. When Support Interrupt Acknowledge
Command

is turned on, the PCI MegaCore function responds to the

interrupt acknowledge command by treating it as a regular target
memory read. The local side must implement the logic necessary to
respond to the interrupt acknowledge command.

For more information on the capabilities list pointer, CIS cardbus pointer,
and interrupt pin registers, refer to

“Configuration Registers” on

page 3–28

.

Master Features

The pci_mt64 and pci_mt32 MegaCore functions also provide the
following options available in the Parameterize - PCI Compiler wizard:

Allow Variable Byte Enables During Burst Transactions

Use in Host Bridge Application

Allow Internal Arbitration Logic

Disable Master Latency Timer

Assume ack64n Response

Enable these features on the Advanced PCI MegaCore Function Features
page as described in the following sections.

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