Program a device, Pci timing support, Program a device –18 pci timing support –18 – Altera PCI Compiler User Manual

Page 52

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1–18

User Guide Version 11.1

Altera Corporation

PCI Compiler

October 2011

Program a Device

Program a
Device

After you have compiled your design, program your targeted Altera
device and verify your design in hardware.

With Altera's free OpenCore Plus evaluation feature, you can evaluate the
PCI MegaCore function before you purchase a license. OpenCore Plus
evaluation allows you to generate an IP functional simulation model and
produce a time-limited programming file.

You can simulate the PCI Compiler MegaCore function in your design
and perform a time-limited evaluation of your design in hardware.

f

For more information on IP functional simulation models, refer to the

Simulating Altera in Third-Party Simulation Tools

chapter in volume 3 of

the Quartus II Handbook.

For more information on OpenCore Plus hardware evaluation using the
PCI MegaCore functions, refer to

“Compliance Summary” on page 10

and

AN 320: OpenCore Plus Evaluation of Megafunctions

.

For more information on setting up licensing for PCI Compiler, refer to

“PCI Timing Support” on page 1–18

.

PCI Timing
Support

Designs that use an Altera PCI Compiler MegaCore function must use an
Altera-provided PCI constraint file. A PCI constraint file does the
following:

Constrains Quartus II compilations so that your design meets PCI
timing requirements

Specifies the required PCI pin assignments for your board layout

The PCI Compiler generates PCI constraint files in the form of Tcl scripts
that allow you to meet the PCI timing requirements in the Quartus II
software.

The constraint files use the following naming convention:

pci_constraints_for_

<variation name>.tcl

These constraint files have been tested against PCI Compiler 11.1 and
Quartus II 11.1 and meet PCI Compiler timing.

To use the constraint file, follow these steps:

1.

Open your project in the Quartus II software.

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