Altera PCI Compiler - Manual (Page 68)

2–10 User Guide Version 11.1 Altera Corporation
PCI Compiler October 2011
Variation File Parameters
MAX_64_BAR_RW_BITS Decimal 8 Maximum number of read/write bits in upper
BAR when using a 64-bit BAR. This
parameter controls the number of bits
decoded in the high BAR of a 64-bit BAR.
(Values for this parameter are integers from
8 to 32.) For example, setting this parameter
to eight (the default value) allows the user to
reserve up to 512 Gigabytes (GBytes).
Note: Most systems will not require that all
of the upper bits of a 64-bit BAR be
decoded. This parameter controls the size
of the comparator used to decode the high
address of the 64-bit BAR.
NUMBER_OF_BARS Decimal 1 Number of base address registers. Only the
logic that is required to implement the
number of BARs specified by this parameter
is used—i.e., BARs that are not used do not
take up additional logic resources. The PCI
MegaCore function sequentially instantiates
the number of BARs specified by this
parameter starting with BAR0. When
implementing a 64-bit BAR, two BARs are
used; therefore, the NUMBER_OF_BARS
parameter should be raised by two.
CAP_PTR Hexadecimal H"40" Capabilities list pointer register. This 8-bit
value sets the capabilities list pointer
register.
CIS_PTR Hexadecimal H"00000000" CardBus CIS pointer. The CIS_PTR sets
the value stored in the CIS pointer register.
The CIS pointer register indicates where the
CIS header is located. For more
information, refer to the PCMCIA
Specification, version 3.0. The functions
ignore this parameter if CIS_PTR is not set
to 0. In other words, if the CIS_PTR_ENA bit
is set to 1, the functions return the value in
CIS_PTR
during a configuration read to the
CIS pointer register. The function returns
H"00000000"
during a configuration read
to CIS when CIS_PTR_ENA is set to 0.
ENABLE_BITS Hexadecimal H"00000000" Feature enable bits. This parameter is a
32-bit hexadecimal value which controls
whether various features are enabled or
disabled. The bit definition of this parameter
is shown in
Table 2–2 .
Table 2–1. PCI MegaCore Function Parameters (Part 4 of 5)
Name Format Default Value Description