Smart_compile_ignores_tdc_for_stratix_pll_changes – Altera Quartus II Settings File User Manual

Page 163

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SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES

Allows the Compiler to skip the fitting stage during smart recompilation when design changes may affect

timing requirements. This option is available only for changes to Cyclone, Stratix, and Stratix GX PLL

parameters, and Stratix GX gigabit transceiver block (GXB) parameters.

Type

Boolean

Device Support

This setting can be used in projects targeting any Altera device family.

Syntax

set_global_assignment -name
SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES <value>

Default Value

Off

MNL-Q21005

2015.05.04

SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES

163

Quartus Settings File Reference Manual

Altera Corporation

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