Altera Quartus II Settings File - Manual (Page 688)

PLL_FEEDBACK_CLOCK_SIGNAL
Allows you to specify whether PLL feedback clock signal should be routed using global or regional routing
paths in the PLL conversion code to fractional PLL. Also allows additionally specifying the return path
type (near/far).
Type
Enumeration
Values
• Far Global Clock
• Far Regional Clock
• Global Clock
• Near Global Clock
• Near Regional Clock
• Regional Clock
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment supports Fitter wildcards.
This assignment is included in the Fitter report.
Syntax
set_instance_assignment -name PLL_FEEDBACK_CLOCK_SIGNAL -to <to> -entity
<entity name> <value>
688 PLL_FEEDBACK_CLOCK_SIGNAL
MNL-Q21005
2015.05.04
Altera Corporation Quartus Settings File Reference Manual
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