Force_merge_pll_fanouts – Altera Quartus II Settings File User Manual

Page 568

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FORCE_MERGE_PLL_FANOUTS

Forces the fanouts of the slave PLL clock output to be merged into the master PLL clock output. This

option should be used only for static PLL clock outputs.

Type

Boolean

Device Support

This setting can be used in projects targeting any Altera device family.

Notes

This assignment supports Fitter wildcards.
This assignment is included in the Fitter report.

Syntax

set_instance_assignment -name FORCE_MERGE_PLL_FANOUTS -from <from> -to <to>
-entity <entity name> <value>

568

FORCE_MERGE_PLL_FANOUTS

MNL-Q21005

2015.05.04

Altera Corporation

Quartus Settings File Reference Manual

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