Signalrace_rule_reset_race – Altera Quartus II Settings File User Manual

Page 335

Advertising
background image

SIGNALRACE_RULE_RESET_RACE

Direct Design Assistant to detect synchronous port and asynchronous port of same register driven by

same signal source

Type

Boolean

Device Support

This setting can be used in projects targeting any Altera device family.

Notes

None

Syntax

set_global_assignment -name SIGNALRACE_RULE_RESET_RACE <value>

MNL-Q21005

2015.05.04

SIGNALRACE_RULE_RESET_RACE

335

Quartus Settings File Reference Manual

Altera Corporation

Send Feedback

Advertising