Signalrace_rule_reset_race – Altera Quartus II Settings File User Manual
Page 335
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SIGNALRACE_RULE_RESET_RACE
Direct Design Assistant to detect synchronous port and asynchronous port of same register driven by
same signal source
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
None
Syntax
set_global_assignment -name SIGNALRACE_RULE_RESET_RACE <value>
MNL-Q21005
2015.05.04
SIGNALRACE_RULE_RESET_RACE
335
Quartus Settings File Reference Manual
Altera Corporation
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