Altera Quartus II Settings File - Manual (Page 969)

VIRTUAL_PIN
Specifies whether an I/O element in a lower-level design entity can be temporarily mapped to a logic
element and not to a pin during compilation. The virtual pin is then implemented as a LUT. This option
should be specified only for I/O elements that become nodes when imported to the top-level design.
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment supports synthesis wildcards.
Syntax
set_instance_assignment -name VIRTUAL_PIN -to <to> -entity <entity name>
<value>
MNL-Q21005
2015.05.04
VIRTUAL_PIN 969
Quartus Settings File Reference Manual Altera Corporation
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