Enable m20k ecc support, Include diagnostic features, Enable m20k ecc support -4 – Altera 100G Interlaken MegaCore Function User Manual

Page 28: Include diagnostic features -4

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Enable M20K ECC Support

The Enable M20K ECC support parameter specifies whether your 100G Interlaken MegaCore function

variation supports the ECC feature in the Stratix V and Arria 10 M20K memory blocks that are

configured as part of the IP core. This parameter is relevant only for IP core variations that target a Stratix

V device or an Arria 10 device.
You can turn this parameter on to enable single-error correct, double-adjacent-error correct, and triple-

adjacent-error detect ECC functionality in the M20K memory blocks configured in your IP core. You can

turn this parameter off to decrease IP core latency and save resources on the device. If you turn on this

feature, you enhance data reliability but increase latency and resource utilization. Without the ECC

feature, a single M20K memory block can support a data path width of 40 bits. With the ECC feature,

eight of those bits are dedicated to the ECC, and an M20K memory block can support a maximum data

path width of 32 bits. Therefore, to support the same data bus width, the Quartus II Fitter must configure

additional M20K blocks. The ECC check adds latency to the path through the memory block, and

increases the amount of device memory used by your IP core.
A checkmark in the check box to the left of the parameter turns this parameter on, specifying that the IP

core supports this feature. A check box with no checkmark indicates that the option is turned off, and the

IP core does not support this feature.
By default, the Enable M20K ECC support parameter is turned off.

Related Information

Embedded Memory Blocks in Stratix V Devices

Information about the built-in ECC feature in Stratix V devices.

Embedded Memory Blocks in Arria 10 Devices

Information about the built-in ECC feature in Arria 10 devices.

Include Diagnostic Features

The Include diagnostic features parameter enables the following diagnostic modes for initial board

bring-up and for system testing in the factory and in the field:
• CRC error counters

• CRC32 error injection on the Interlaken link

• PRBS generation and checking

• Factory test features
You can turn this parameter on to enable this IP core functionality, or turn it off to save resources on the

device. If you turn this parameter on, you control the diagnostic modes by accessing 100G Interlaken IP

core registers.
A checkmark in the check box to the left of the parameter turns this parameter on, specifying that the IP

core has this additional functionality. A check box with no checkmark indicates that the option is turned

off, and the IP core does not have this functionality.
By default, the Include diagnostic features parameter is turned off.

Related Information

PRBS Generation and Validation

on page 8-2

CRC32 Error Injection

on page 8-7

3-4

Enable M20K ECC Support

UG-01128

2015.05.04

Altera Corporation

100G Interlaken IP Core Parameter Settings

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