Altera CPRI v6.0 MegaCore Function - Manual (Page 77)

The Avalon-MM interface implements a standard memory-mapped protocol. You can connect an Avalon
master to this bus to access the registers of the embedded Arria 10 Native PHY IP core.
Table 3-25: CPRI v6.0 IP Core Arria 10 Transceiver Reconfiguration Interface Signals
The
reconfig_clk
clocks the signals on the CPRI v6.0 IP core Arria 10 transceiver reconfiguration interface.
Signal Name Direction Description
reconfig_clk
Input Clocks the signals on the CPRI v6.0 transceiver reconfigura‐
tion interface. Supports frequency range 100–150 MHz.
reconfig_reset
Input Asynchronous active-high reset signal. Resets the CPRI v6.0
Arria 10 transceiver reconfiguration interface and all of the
registers to which it provides access.
reconfig_write Input You must assert this signal to request a write transfer.
reconfig_read Input You must assert this signal to request a read transfer.
reconfig_address[9:0] Input Address for reads and writes.
reconfig_
writedata[31:0]
Input Write data.
reconfig_
readdata[31:0]
Output Read data.
reconfig_waitrequest Output The interface is busy. Do not issue Avalon-MM commands
to this interface while this signal is high.
Related Information
Avalon Interface Specifications
For more information about the Avalon-MM protocol, including timing diagrams, refer to the Avalon
Memory-Mapped Interfaces chapter.
Arria 10 Transceiver PHY User Guide
Information about the Arria 10 Native PHY IP core hard PCS registers that you can program through the
Arria 10 transceiver reconfiguration interface.
Arria 10 Transceiver Registers
Detailed information about the Arria 10 transceiver registers.
Interface to the External Reset Controller
Table 3-26: CPRI v6.0 IP Core External Reset Controller Interface Signals
The CPRI v6.0 IP core requires that you generate and connect at least one external transceiver reset controller.
Signal Name Direction Description
xcvr_tx_analogreset Input Analog reset to transmitter from external reset controller.
xcvr_tx_digitalreset Input Digital reset to transmitter from external reset controller.
UG-01156
2014.08.18
Interface to the External Reset Controller 3-47
Functional Description Altera Corporation
Send Feedback