Altera Stratix V Advanced Systems Development Board - Manual (Page 44)

2–34 Chapter 2: Board Components
Components and Interfaces
Stratix V Advanced Systems Development Board January 2014 Altera Corporation
Reference Manual
G2 FMC_CLK_M2C_P1
LVDS
M9 Differential clock input 1
G3 FMC_CLK_M2C_N1 L9 Differential clock input 1
C3 FMC_DP_C2M_N0 1.4-V PCML W42 Transceiver transmit channel
A23 FMC_DP_C2M_N1 1.4-V PCML U42 Transceiver transmit channel
A27 FMC_DP_C2M_N2 1.4-V PCML R42 Transceiver transmit channel
A31 FMC_DP_C2M_N3 1.4-V PCML N42 Transceiver transmit channel
A35 FMC_DP_C2M_N4 1.4-V PCML J42 Transceiver transmit channel
A39 FMC_DP_C2M_N5 1.4-V PCML K40 Transceiver transmit channel
B37 FMC_DP_C2M_N6 1.4-V PCML H40 Transceiver transmit channel
B33 FMC_DP_C2M_N7 1.4-V PCML G42 Transceiver transmit channel
B29 FMC_DP_C2M_N8 1.4-V PCML E42 Transceiver transmit channel
B25 FMC_DP_C2M_N9 1.4-V PCML D40 Transceiver transmit channel
C2 FMC_DP_C2M_P0 1.4-V PCML W41 Transceiver transmit channel
A22 FMC_DP_C2M_P1 1.4-V PCML U41 Transceiver transmit channel
A26 FMC_DP_C2M_P2 1.4-V PCML R41 Transceiver transmit channel
A30 FMC_DP_C2M_P3 1.4-V PCML N41 Transceiver transmit channel
A34 FMC_DP_C2M_P4 1.4-V PCML J41 Transceiver transmit channel
A38 FMC_DP_C2M_P5 1.4-V PCML K39 Transceiver transmit channel
B36 FMC_DP_C2M_P6 1.4-V PCML H39 Transceiver transmit channel
B32 FMC_DP_C2M_P7 1.4-V PCML G41 Transceiver transmit channel
B28 FMC_DP_C2M_P8 1.4-V PCML E41 Transceiver transmit channel
B24 FMC_DP_C2M_P9 1.4-V PCML D39 Transceiver transmit channel
C7 FMC_DP_M2C_N0 1.4-V PCML AB44 Transceiver receive channel
A3 FMC_DP_M2C_N1 1.4-V PCML Y44 Transceiver receive channel
A7 FMC_DP_M2C_N2 1.4-V PCML V44 Transceiver receive channel
A11 FMC_DP_M2C_N3 1.4-V PCML T44 Transceiver receive channel
A15 FMC_DP_M2C_N4 1.4-V PCML M44 Transceiver receive channel
A19 FMC_DP_M2C_N5 1.4-V PCML K44 Transceiver receive channel
B17 FMC_DP_M2C_N6 1.4-V PCML H44 Transceiver receive channel
B13 FMC_DP_M2C_N7 1.4-V PCML F44 Transceiver receive channel
B9 FMC_DP_M2C_N8 1.4-V PCML D44 Transceiver receive channel
B5 FMC_DP_M2C_N9 1.4-V PCML C42 Transceiver receive channel
C6 FMC_DP_M2C_P0 1.4-V PCML AB43 Transceiver receive channel
A2 FMC_DP_M2C_P1 1.4-V PCML Y43 Transceiver receive channel
A6 FMC_DP_M2C_P2 1.4-V PCML V43 Transceiver receive channel
A10 FMC_DP_M2C_P3 1.4-V PCML T43 Transceiver receive channel
A14 FMC_DP_M2C_P4 1.4-V PCML M43 Transceiver receive channel
A18 FMC_DP_M2C_P5 1.4-V PCML K43 Transceiver receive channel
Table 2–21. FMC Port Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 5)
Board
Reference
(J8)
Schematic Signal
Name
I/O Standard
Stratix V GX FPGA1
Device Pin Number
Description