Altera Stratix V Advanced Systems Development Board User Manual
Page 74
2–64
Chapter 2: Board Components
Memory
Stratix V Advanced Systems Development Board
January 2014
Altera Corporation
Reference Manual
F2
FLASH_D0
1.8-V
Data bus
E2
FLASH_D1
1.8-V
Data bus
G3
FLASH_D2
1.8-V
Data bus
E4
FLASH_D3
1.8-V
Data bus
E5
FLASH_D4
1.8-V
Data bus
G5
FLASH_D5
1.8-V
Data bus
G6
FLASH_D6
1.8-V
Data bus
H7
FLASH_D7
1.8-V
Data bus
E1
FLASH_D8
1.8-V
Data bus
E3
FLASH_D9
1.8-V
Data bus
F3
FLASH_D10
1.8-V
Data bus
F4
FLASH_D11
1.8-V
Data bus
F5
FLASH_D12
1.8-V
Data bus
H5
FLASH_D13
1.8-V
Data bus
G7
FLASH_D14
1.8-V
Data bus
E7
FLASH_D15
1.8-V
Data bus
F8
FLASH_OEN
1.8-V
Output enable
F7
FLASH_RDYBSYN
1.8-V
Ready
D4
FLASH_RESETN
1.8-V
Reset
G8
FLASH_WEN
1.8-V
Write enable
C6
FLASH_WPN
1.8-V
Write protect
Table 2–28. Flash Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 2)
Board
Reference (U86)
Schematic Signal Name
I/O Standard
Description